, P. P. G. J. Power Optimization in Johnson Counter through Clock Gating with Static Energy Recovery Logic. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 12, p. 6759–6766, 2015. DOI: 10.17762/ijritcc.v3i12.5136. Disponível em: https://mail.ijritcc.org/index.php/ijritcc/article/view/5136. Acesso em: 21 aug. 2026.