ABDULLAH, M.; CHOURASIA, B. . FPGA Implementation of Double Precision Floating Point Multiplier . International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 10, n. 12, p. 155–160, 2022. DOI: 10.17762/ijritcc.v10i12.5896. Disponível em: https://mail.ijritcc.org/index.php/ijritcc/article/view/5896. Acesso em: 24 sep. 2025.